X-Nico

unusual facts about instruction set architecture



HyperSPARC

The hyperSPARC, code-named "Pinnacle", is a microprocessor that implements the SPARC Version 8 instruction set architecture (ISA) developed by Ross Technology for Cypress Semiconductor.

Intel SHA extensions

Intel SHA Extensions are set of extensions to the x86 instruction set architecture which support hardware acceleration of Secure Hash Algorithm (SHA) family.

Moscow Center of SPARC Technologies

MCST develops microprocessors based on 2 different instruction set architecture (ISA): Elbrus and SPARC

Elbrus-90micro (1998-2010) is a computer line based on SPARC instruction set architecture (ISA) microprocessors: MCST R80, R150, R500, R500S and MCST-4R working at 80, 150, 500 and 1000 MHz.

National Semiconductor PACE

PACE had four general-purpose accumulators, with an instruction set architecture loosely based on the earlier IMP-16 architecture, which in turn had been inspired by the Data General Nova minicomputer.

VAX 9000

The VAX 9000, code named Aridus or Aquarius, was a family of Supercomputer and mainframe computers developed and manufactured by Digital Equipment Corporation (DEC) using processors implementing the VAX instruction set architecture (ISA).


see also

IBM POWER

the IBM POWER Instruction Set Architecture, a predecessor to the PowerPC/Power ISA instruction set architecture;

MicroBlaze

In terms of its instruction-set architecture, MicroBlaze is very similar to the RISC-based DLX architecture described in a popular computer architecture book by Patterson and Hennessy.

Xerox Daybreak

Daybreak was the last machine released in the D* (pronounced D-Star) series of machines, at least some of which shared an instruction set architecture designed by Butler Lampson known as Wildflower.